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NCP5021
Figure 4. Typical Switching Operation
Although the total ohmic resistance plays an important
role in the losses developed in the converter, the switching
losses are key when the operating frequency is beyond a
few kilohertz range. To minimize such losses, the internal
power NMOS is designed to minimize the dI/dt, thus
minimizing the I*V crossing time. As a consequence, the
slope of the positive going voltage ? VLX ? present at the Lx
pin is very fast as well and an overshoot is created since the
Schottky rectifier has an intrinsic turn-on time: the voltage
keeps going until the diode turns ? on, clamping the VLX
in Figure 5. The proposed Schottky, depicted in the
schematic Figure NO TAG, is a good alternative to
minimize such an overshoot.
On the other hand, the same overshoot is propagated to
the Vout voltage when the system operates under open load
condition. As a consequence, it is strongly recommended
to implement a simple filter, built with a small footprint
resistor, to makes sure that no any uncontrolled operation
of the high sensitive pin Vos will happen under the worst
case conditions: see Figure 1, resistor R5.
voltage at the output value. Such a mechanism is depicted
Figure 5. Typical Turn On Time of the Schottky Rectifier
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